In the scope of the development of future integrated wideband networks discussions are held about which method is to be selected for the transmission of the digital or analog information --partly requiring much bandwidth --in digital networks. The availability of wideband networks depends on many factors, among other things on the standardization, the cost-effective oPtical wideband transmission, VLSI circuits for very high processing rates, as well as the requirements of the user and the network operator. The concept of such wideband networks is based on the recently established integrated services communications network ISDN (Integrated Services Digital Network).
A first option for extending the integrated services communications network ISDN consists in the allocation of a limited number of wideband channels, a physical connection being established for each wideband channel. However, the thus established network with circuit switching does not meet all the requirements of the network operator with respect to an adaptable network for transmitting any services, among them such services that do not yet have internationally standardized parameters, as well as requirements with respect to future services.
In the European Patent Application EP-A-0-183-592 a wideband switching system was proposed, in which the messages are subdivided into blocks (cells) and transmitted over wideband transmission links according to an a synchronous time-division multiplex method. The blocks (cells) can have equal or different lengths. The blocks comprise useful information as well as address information, the address information being comprised in a so-called header. The number of bits of a block indicates its length, in the standardization proposals values between 120 and 256 bits being provided for the useful information and 32 or 16 bits for the header. The time intervals in which blocks are transmitted are denoted frames. A frame can contain a valid block or be empty. Between two subscribers of the wideband switching system there is a "virtual connection", which is maintained in that the blocks transmitted from the subscriber stations are provided with unambiguous header codes enabling the switching nodes to correctly route the blocks. The blocks from an incoming line which arrive at the switching node are transmitted onto an outgoing line while converting the header. Since two or more blocks may arrive for the same output line during a frame, so-called queue buffers have to be provided in the switching node. In the queue buffer one or more of these blocks are temporarily stored until there is a frame available for them.
With respect to the buffer arrangement, the switching nodes can be centrally buffered systems (as disclosed in the European Patent Application EP-A-0-183-592), or decentrally buffered systems. With centrally buffered systems there is only a single buffer to which each incoming line delivers its arriving blocks and from which each outgoing line again reads out blocks intended for the latter line. Systems with decentralized buffering are further distinguished as to whether a buffering of blocks only takes place on the input side (an embodiment thereof is described, for example, in the not previously published German Patent Application with DE-A-37-14-385) or whether the buffers are arranged only before the outgoing lines (compare, for example, IEEE 1987 Int. Switching Symp., Phoenix, March 1987, pp. B 10.2.1 ff., "The Knockout Switch: A Simple, Modular Architecture for High-Performance Packet Switching" by Y. S. Yeh et al.) or whether systems with both input and output buffering are concerned.
For avoiding overload in wideband switching systems of any buffer arrangement, appropriate equipment has to be provided in each switching node. From a contribution by J. S. Turner "New Directions in Communications" at the International Zurich Seminar on Digital Communications, March 1986, pp. A 3.1 to A 3.8, a circuit arrangement is known according to which a bidirectional counter is provided in the switching node, which counter counts the blocks transmitted from the subscriber station and decrements the count at specific instants in accordance with the transmission rate determined by the subscriber station. If the bidirectional counter exceeds a count that can be specified by the subscriber station, the switching node will recognize overload (leaky-bucket method).
In FIG. 1 the circuit arrangement is represented on which the said leaky-bucket method is based, in so far as this is required for comprehending the invention. The bidirectional counter VRZ increments according to the leaky-bucket method with each block coming from the subscriber station T, and decrements at specific instants (clock C). The count of the bidirectional counter VRZ is compared by means of a comparator V to the count that has been predetermined by the subscriber station T (by which the maximum bit rate is determined) and has been stored in a memory S provided in the switching node VK.
If this count stored in the memory S is equal to 1, it can be easily verified whether the maximum permissible bit rate is adhered to. If the count stored in memory S is chosen to be greater than 1;t can be verified whether a predeterminable mean value of the bit rate is adhered to.
In a wideband switching system in which the messages are transmitted over the wideband transmission links according to the a synchronous time-division multiplex method, both the duration of the connection and the number of transmitted blocks are to be determined for the purpose of charging.